INSIGHT: Attacking Industry-Adopted Learning Resilient Logic Locking Techniques Using Explainable Graph Neural Network

INSIGHT: Attacking Industry-Adopted Learning Resilient Logic Locking Techniques Using Explainable Graph Neural Network

Speakers: Lakshmi Likhitha Mankali, PhD Candidate, New York University; Ozgur Sinanoglu, Professor, New York University; Satwik Patnaik, University of Delaware

Conference: USENIX Security '24

YouTube: https://www.youtube.com/watch?v=peliS0oy6JQ

Overview

In an era defined by a globalized IC supply chain, hardware security vulnerabilities have become a paramount concern, particularly Hardware IP piracy. This talk, presented by Lakshmi Likhitha Mankali, Ozgur Sinanoglu, and Satwik Patnaik, delves into the critical challenge of protecting integrated circuit (IC) designs from malicious actors within the supply chain. Logic locking has emerged as a prominent defense mechanism, gaining significant traction and investment from both government programs like DARPA's ACE, ECLIPSE, and SAHARA, and commercial entities like Synopsys and Mentor Graphics, who have integrated it into their Electronic Design Automation (EDA) tools. However, the rise of sophisticated machine learning (ML) based attacks has prompted the development of "learning resilient" logic locking techniques, specifically designed to thwart these structural inference attacks.

The core contribution of this research is INSIGHT, a novel attack framework that leverages Explainable Graph Neural Networks (GNNs) to successfully compromise these supposedly resilient logic locking schemes. INSIGHT demonstrates that even industry-adopted techniques like TRLL and TRLL+ are vulnerable, achieving significantly higher key prediction accuracy compared to existing ML-based attacks. The talk not only exposes critical weaknesses in current hardware IP protection strategies but also highlights the power of explainable AI in uncovering hidden attack vectors, thereby forcing a re-evaluation of how hardware intellectual property is secured against sophisticated adversaries.

Background

▶ Watch: Introduction: Hardware security and globalized IC supply chain (0:00)

The modern IC supply chain is a complex, globalized ecosystem. Prior to the 1980s, IC design companies often followed a vertical integration model, handling design, fabrication, and testing in-house. However, the escalating complexity and cost of manufacturing advanced chips—exemplified by Apple's M1 Ultra with 114 billion transistors and TSMC's $20 billion investment in a 3-nanometer fab—have made owning fabrication facilities prohibitively expensive for most design houses. Consequently, the industry has shifted to outsourcing fabrication and testing to third-party facilities, introducing a host of hardware security risks including hardware Trojans, IC counterfeiting, reverse engineering, and critically, hardware IP piracy.

Hardware IP piracy is a major threat where unauthorized entities within the supply chain, possessing access to the chip's design, can overbuild or pirate chips, leading to substantial economic losses. A report by the US Department of Justice cited an $8.75 billion loss suffered by a prominent IC design company due to IP theft. To combat this, several IP protection techniques have been proposed, with logic locking being a leading contender. Logic locking modifies the original IC design by inserting key gates (e.g., XOR/XNOR gates or MUXes) and key inputs, with a secret key stored in a tamper-proof memory. The design functions correctly only when the correct secret key is applied; an incorrect key results in erroneous outputs.

The typical threat model considered places the attacker at the foundry level. After logic synthesis, the locked design undergoes physical design and is sent to a third-party foundry for fabrication. The attacker, located at this foundry, can reverse engineer the locked design with the objective of retrieving the secret key to pirate or overproduce chips.

The emergence of machine learning (ML) based attacks presented a new challenge to traditional logic locking. These attacks often leverage structural hints from the design to infer key values. In response, researchers developed learning resilient logic locking techniques. These techniques aim to break the correlation between the type of key gate and its corresponding key value. For instance, in traditional logic locking, an XOR gate might uniquely map to a key value of 0 or 1. Learning resilient techniques achieve resilience by redacting inverters, making it possible for both an XOR gate with a key value of 1 and an XOR gate with a key value of 0 to appear structurally similar. The same principle applies to MUX-based key gates. This work specifically targets seven such learning resilient locking techniques, including the industry-adopted TRLL and TRLL+, which existing ML-based attacks like SEAL, SNAPSHOT, SCOPE, OMLA, and MAXLINK have failed to compromise.

Key Findings

▶ Watch: Attacker's threat model in the IC supply chain (4:00)

The INSIGHT framework delivers several critical findings that challenge the efficacy of current hardware IP protection strategies:

1. Breaking Learning Resilient Logic Locking: INSIGHT successfully attacks seven different learning resilient logic locking techniques, including the industry-adopted TRLL and TRLL+, which were previously considered robust against ML-based attacks. It achieves a 2.96 times higher key prediction accuracy compared to existing ML-based attacks like SCOPE, and 1.86 times higher accuracy compared to OMLA, across all considered techniques.

1. The "Inverter/Buffer Prediction" Insight: The core breakthrough of INSIGHT lies in re-framing the key prediction problem. Through the use of explainable ML, the researchers discovered that despite inverter redaction, the key prediction problem could be effectively mapped to an inverter/buffer prediction problem. This novel interpretation allowed INSIGHT to infer key values by identifying whether a key gate effectively acts as an inverter or a buffer, leading to a significant 1.86 times improvement in key prediction accuracy compared to preliminary GNN models.

1. Robustness Against Logic Resynthesis: Recognizing that real-world locked designs undergo logic resynthesis—a process that introduces graph transformations—INSIGHT incorporates an attention layer into its GNN architecture. This attention mechanism dynamically assigns importance scores to different nodes around the key gate, improving key prediction accuracy for resynthesized designs by 10%.

1. Addressing Limited Training Data: To overcome challenges posed by limited training datasets (due to proprietary locking techniques or lack of diversity), INSIGHT introduces two effective strategies:

• Data Augmentation: By performing graph transformations on locked designs, INSIGHT can synthetically expand its training dataset, leading to a 1.10 times increase in key prediction accuracy.
• Semi-supervised Learning: This approach leverages unlabeled nodes in the locked design to generate additional training data, further boosting key prediction accuracy by 1.29 times.

1. Practical Efficacy Demonstrated: The practical impact of INSIGHT is vividly demonstrated through a real-world image processing application, Gaussian blurring. The design recovered by INSIGHT produces an output remarkably closer to the "golden output" compared to designs recovered by existing attacks like OMLA, showcasing its ability to effectively recover full design functionality.

Technical Deep Dive

▶ Watch: Targeting industry-adopted resilient locking and existing attack failures (5:55)

INSIGHT's technical prowess stems from a sophisticated application of Graph Neural Networks (GNNs) combined with explainable ML principles, specifically tailored to the unique challenges posed by learning resilient logic locking.

The initial approach, common in existing ML-based attacks, involved mapping the key prediction problem to a GNN-based node classification. Circuits are naturally represented as graphs, with gates and wires as nodes and edges. The process entails converting the locked design into a graph, extracting subgraphs around each key gate, and then extracting features for the nodes within these subgraphs. These features are then fed into a GNN to predict the key value (0 or 1). However, preliminary modeling revealed a key prediction accuracy of only around 50%, essentially a random guess. This failure indicated that the GNN, treated as a black box, was unable to discern meaningful patterns from the structurally obscured key gates.

To understand this failure, the researchers turned to explainable ML. Traditional neural networks provide predictions but offer little insight into why a particular prediction was made. Explainable GNNs, conversely, provide important scores for features and nodes, elucidating the reasoning behind their predictions. An ablation study was conducted on state-of-the-art explainable GNNs, including GNN Explainer, SubgraphX, ZORRO, and PGExplainer. GNN Explainer was selected for its balance of relevant explanations and computational efficiency, boasting a runtime of just 6 seconds.

Through the analysis of explanations generated by GNN Explainer, the critical insight emerged: the key prediction problem could be re-framed as an inverter/buffer prediction problem. Even with inverter redaction, which attempts to remove the direct correlation between key gate structure and key value, the GNN Explainer revealed that specific configurations of XOR key gates with a key value of 1 could be consistently mapped to an "inverter" functionality, while XOR key gates with a key value of 0 could be mapped to a "buffer" functionality. This structural interpretation, hidden from previous attacks, allowed INSIGHT to accurately infer the underlying key value. By incorporating this advanced problem modeling, the key prediction accuracy increased by 1.86 times.

A significant challenge in realistic scenarios is that locked designs undergo logic synthesis (or resynthesis), a process involving various graph transformations before physical design. This resynthesis can alter the local structure around key gates, causing the important scores for gates around the key gate to vary, thus reducing INSIGHT's performance. To counter this, an attention layer was added to the GNN architecture. This attention mechanism allows the GNN to dynamically assign varying importance scores to different nodes around the key gate during training, effectively learning to prioritize relevant structural information despite synthesis-induced variations. This addition improved the key prediction accuracy for resynthesized designs by 10%.

Finally, addressing the practical constraint of limited training data (due to proprietary locking techniques or insufficient diversity), INSIGHT incorporated two data-enhancement strategies:

1. Data Augmentation: This technique performs graph transformations on existing locked designs to generate a larger and more diverse training dataset. This approach increased key prediction accuracy by 1.10 times.
2. Semi-supervised Learning: This method leverages unlabeled (unknown) nodes within the locked design itself to generate additional training data, further boosting key prediction accuracy by 1.29 times.

Collectively, these technical innovations, from the explainable GNN-guided problem re-framing to the adaptive mechanisms for resynthesis and data scarcity, enable INSIGHT to achieve its superior attack performance against learning resilient logic locking techniques.

Demo / Proof of Concept

▶ Watch: Initial GNN attack modeling and its random guess failure (6:10)

The practical efficacy of INSIGHT was compellingly demonstrated through a real-world application: a Gaussian blurring image processing circuit. This example served to illustrate how INSIGHT's ability to accurately recover secret keys translates directly into the ability to recover the original, functional design.

The demonstration involved an input image and a known "golden output" representing the correctly blurred image. The researchers then compared the output produced by a design recovered using an existing ML-based attack, OMLA, with the output from a design recovered using INSIGHT.

The design recovered by OMLA, an attack that fails against learning resilient logic locking, produced an output that was "very different from the golden output." This visually confirmed OMLA's inability to correctly infer the secret key and thus unlock the design's intended functionality.

In stark contrast, the design recovered by INSIGHT produced an output image that was "closer to the golden output." This visual evidence powerfully showcased INSIGHT's success in retrieving the secret key and restoring the correct functionality of the locked design. The implication is clear: an attacker using INSIGHT could effectively pirate or overproduce fully functional chips, bypassing the intended hardware IP protection.

Beyond this specific image processing example, the paper provides further results on a wider range of hardware architectures, including arithmetic circuits, controller designs, different synthesis settings, and other practical designs such as crypto cores and processors, underscoring the broad applicability and robustness of the INSIGHT attack framework.

Defensive Implications

▶ Watch: Key insight: Inverter/buffer prediction from GNN explanations (8:10)

The findings presented by INSIGHT carry significant and concerning implications for hardware defenders and designers relying on logic locking for IP protection. The core message is unequivocal: learning resilient logic locking techniques, including industry-adopted solutions like TRLL and TRLL+, are no longer secure against sophisticated ML-based attacks.

Defenders must recognize that the strategies employed by these "resilient" techniques, such as inverter redaction to break structural correlation, have been effectively bypassed. INSIGHT demonstrates that even seemingly obscure structural hints, when analyzed through the lens of explainable GNNs, can reveal sufficient information for key recovery. This implies a fundamental weakness in the design philosophy of these locking mechanisms, as they fail to truly obscure the underlying functional logic from an advanced adversary with reverse engineering capabilities.

Therefore, hardware IP protection strategies need an urgent re-evaluation. Defenders should:

1. Cease Reliance on Current Learning Resilient Techniques: The demonstrated vulnerabilities mean that designs protected solely by TRLL, TRLL+, or similar techniques are at high risk of IP piracy. Continued reliance on these methods provides a false sense of security.
2. Investigate Novel Locking Paradigms: The industry needs to explore and develop fundamentally new logic locking approaches that are robust against explainable ML and GNN-based attacks. This might involve techniques that introduce more profound functional obfuscation, rather than just structural de-correlation.
3. Combine Protection Strategies: Logic locking might need to be augmented with other hardware security techniques, such as IC camouflaging, split manufacturing, or advanced tamper detection mechanisms, to create a multi-layered defense. A holistic approach is crucial, acknowledging that no single technique is infallible.
4. Embrace Adversarial Machine Learning: Designers of future locking techniques should proactively employ adversarial ML principles, testing their defenses against the most advanced attack methodologies, including those that leverage explainable AI, from the outset.
5. Re-evaluate Threat Models: The success of INSIGHT underscores the need to update threat models to account for adversaries equipped with advanced ML capabilities and the ability to perform deep structural analysis of reverse-engineered designs.

In essence, INSIGHT serves as a critical wake-up call, highlighting that the arms race in hardware security continues unabated. The era of assuming "learning resilient" logic locking is sufficient is over, necessitating a rapid shift towards more robust and provably secure hardware IP protection methodologies.

Key Takeaways

• Learning Resilient Logic Locking is Vulnerable: Industry-adopted techniques like TRLL and TRLL+, designed to thwart ML-based attacks, are shown to be effectively compromised by the INSIGHT framework.
• Explainable ML Reveals Hidden Vulnerabilities: The use of Explainable Graph Neural Networks (GNNs), specifically GNN Explainer, was crucial in uncovering the underlying structural weaknesses that enable INSIGHT's attack.
• Novel Problem Re-framing: INSIGHT's core innovation is mapping the key prediction problem to an inverter/buffer prediction problem, significantly boosting key recovery accuracy despite inverter redaction.
• Robustness Against Real-World Challenges: The framework incorporates an attention layer to maintain performance against logic resynthesis and employs data augmentation and semi-supervised learning to handle limited training data.
• Practical Impact Demonstrated: INSIGHT's ability to recover functional designs was proven through a real-world Gaussian blurring application, producing outputs close to the golden reference.
• Urgent Need for Stronger Defenses: Hardware defenders must re-evaluate current IP protection strategies and invest in new, more robust logic locking techniques or multi-layered security approaches to counter sophisticated ML-driven adversaries.

About the Speaker(s)

Lakshmi Likhitha Mankali is a PhD candidate at New York University, where she is conducting research under the supervision of Professor Ozgur Sinanoglu. Her work, including the INSIGHT project, focuses on critical areas of hardware security.

Ozgur Sinanoglu is a Professor at New York University. He is a key contributor to the INSIGHT research, providing academic supervision and expertise in the field of hardware security.

Satwik Patnaik is affiliated with the University of Delaware and collaborated on this research, contributing to the joint work presented.